Xilfpga Reset Issues

Owned by Russell Joyce (Deactivated)
06 Nov, 2017
1 min read

The xilfpga library used to program the board from U-Boot and Linux, via firmware on the PMU using PCAP, has issues resetting the FPGA logic.

Specifically, the PS->PL reset signals are triggered after the FPGA has been programmed, causing the system (including any MicroBlaze software) to run briefly before the reset occurs.

To fix this, the reset signals can be brought low before the PL is re-enabled after programming, and then raised high again afterwards.

For a fixed version of xilfpga, see the forked repo at  https://github.com/RTSYork/embeddedsw (specifically this commit).