The Zybo Z7 has an HDMI output (TX) connector on the top-left of the board, which provides a simple 24-bits-per-pixel (8 red, 8 green, 8 blue) display output from the SoC.

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The HDMI output uses DMA to copy data directly from the DDR. To allow this, you will need a high-performance AXI slave port on the Zynq Processing System.
As we are using S_AXI_HP0 for HLS components /wiki/spaces/RTS/pages/35689890, using S_AXI_HP1 for the HDMI will give the best performance, and avoid adding unnecessary additional bus logic to the FPGA fabric.
The script should enable this interface for you, but from this point on you will need to be careful in connection automation dialogs to ensure that the HDMI and HLS components use the correct interfaces.

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Adding the HDMI output pin constraints

To connect map the external HDMI pins from the block design to the correct physical pins of the SoC that connect to the HDMI TX port on the Zybo Z7 board, a set of pin constraints (from hardware/zybo_z7_hdmi.xdc) needs to be added to your Vivado project.

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The hardware design should now be ready for synthesis, implementation, and exporting to SDKVitis.

Using HDMI output

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When using the HDMI core, you should use the following SDK feature to reset and program the FPGA whenever you run your software, in order to properly reset the hardware as well as the software:

Under Run -> Run Configurations, click your current Run Configurations on the left and enable options to "Reset the entire system" and "Program the FPGA".

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in Vitis

The HDMI hardware uses two frame buffers in DDR to output images from. You may want to use the second frame buffer for smoother transitions between images, as switching is instantaneous, or to hold a completely separate second image.

Data is stored in the frame buffer using 32 bits per pixel. Each colour component takes one byte, with the highest byte unused, followed by red, blue and green. This gives a pixel format of 0x00RRBBGG0x00RRGGBB.

Remember to flush the caches after changing the frame buffer, so data is written back to DDR for the hardware to use. If writing the entire buffer, completely flushing the caches with Xil_DCacheFlush() will be more efficient than flushing a region, as the caches are significantly smaller than the frame buffer.

Adding the software drivers

Import your new hardware and create a Hello World application on it.

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The drivers for the Xilinx VDMA and VTC cores should be added to your BSP project automatically (if they're not, try recreating the BSP), but System automatically. You can check this by opening the platform.spr file.

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However additional drivers are required for the Digilent cores. To add these into your SDK project, drag Right click the src  folder in your application project and select Import Sources.  Import the software/zybo_z7_hdmi/ folder from the repository into the src folder of your application project within the SDK window, and files into a folder called zybo_z7_hdmi.

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Now add #include zybo_z7_hdmi/display_ctrl.h in your source and you are ready to go.

Controlling the HDMI output from C

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These functions are documented in the library source code, and hdmi_example.c shows how to set up the output and display a basic gradient on the screen.

132321313213213Possible Possible output resolutions are in zybo_z7_hdmi/vga_modes.h - the widescreen monitors in the hardware labs work well with a 1440x900 resolution (this is fine for EMBS).

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